CMOS Design: a Digital Parallel Counter Architecture using Transmission Gate (TG) Flip-Flops as Divide-by-N Prescaler

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CMOS Design: a Digital Parallel Counter Architecture using Transmission Gate (TG) Flip-Flops as Divide-by-N Prescaler

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CMOS Design: a Digital Parallel Counter Architecture using Transmission Gate (TG) Flip-Flops as Divide-by-N Prescaler

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Brand LAP LAMBERT Academic Publishing
EAN
  • 9786630009019

Editions Notre Savoir

Conception CMOS: Architecture d'un compteur parallèle numérique CMOS utilisant des bascules à...

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Edizioni Sapienza

Progettazione CMOS: Architettura di un contatore parallelo digitale CMOS che utilizza flip-flop...

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Edicoes Nosso Conhecimento

Conceção de CMOS: Uma arquitetura contador paralelo digital CMOS que utiliza flip-flops...

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Verlag Unser Wissen

CMOS-Entwurf: Eine digitale CMOS-Parallelzählerarchitektur unter Verwendung von Transmission-Gate-Flipflops (TG-Flipflops) als N-Teiler-Vorschalter

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